Variable Decimation (1:1024)
KEY FEATURES
  • Variable decimation from 1 to 1024:
    • Stage 1: anti-aliasing filter + fixed 1:2 decimation
    • Stages 2,3,4,5:
      • Anti-aliasing filter + fixed 1:4 decimation
    • Stage 6: anti-aliasing filter
    • Stage 0 or 7: x2 interpolation + variable N:2ˆ24 decimation
  • Maximum 40 Msamples complex input sampling rate
  • AGC control for analog circuit
  • Pilot tone detection and accurate frequency measurement for aided acquisition
  • Single 5V supply
  • Connectorized 3”x 3” module for ease of prototyping. Standard 40 pin 2mm dual row connectors (left, right, bottom)
  • Interfaces with 5V and 3.3V logic

  • ComScope–enabled: key internal signals can be captured in real-time and displayed on a host computer

    ComBlock COMPATIBILITY LIST
     
    Input Output
    COM-300x RF receivers COM-1001 BPSK/QPSK/OQPSK Demodulator
      COM-1011/1018 DSSS Demodulator
      COM-1027 FSK/MSK/GFSK/GMSK Demodulator
      COM-2001 digital-to-analog converter (baseband)

     

    COM-1008
    Specifications
    (105 KB)
    VHDL Source Code / IP Overview
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